Vehicle gateway platform with massive native CAN support
- 4 Arm® Cortex®-A53 cores and 3 Arm® Cortex®-M7 cores including lockstep support
- Comprehensive connectivity including 18x CAN FD + dedicated protocol engine, furthermore FlexRay, LIN, SPI, Ethernet with TSN, PCI Express®, USB and I²C
- Hardware Security Engine for secure boot and accelerated security services
Since the MPX-S32G274A System-on-Modules offer multiple native CAN interfaces as well as comprehensive FlexRay, LIN and Ethernet support target markets can be found in real-time connected vehicles, mobile machinery and automotive test and measurement equipment. Further application areas include data loggers, edge gateways and fail-safe programmable logic controllers (PLCs).
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NXP® S32G274A CPU: 4 Arm® Cortex®-A53 64-bit cores at 1Ghz, 3 Arm® Cortex® M7 dual-cores at 400Mhz
4 GB 32-bit soldered LPDDR4 RAM at 3200MT/s
64 MB QSPI Flash
Interface for external SD card multiplexed with eMMC
Boot select: XSPI, eMMC or external SD card
up to 32 GB
1x 2.5 Gbs
|Analog Inputs (ADCs):|
|JTAG Debug Interface:|
Hardware Security Engine (HSE) for secure boot and accelerated security services
Advanced functional safety hardware and software for ASIL D systems AEC-Q100 Grade 2 device: -40 °C to 105 °C
|Power Supply Voltage:|
Single DC power input (+9 V to +36 V)
|Optional Power Supply Voltage:|
Single DC power input (+6 V to +36 V)
|Typical Power Consumption:|
0 °C to 70 °C
|Optional Extended Temperature:|
-40 °C to 85 °C
82 mm x 50 mm
▪ VxWorks (on request)
▪ Others (on request)
▪ All I/O pins available on 314-pin edge connector
▪ Low Latency Communication Engine (LLCE) for vehicle networks acceleration
▪ Packet Forwarding Engine (PFE) for Ethernet networks acceleration
▪ Dev Kit available for immediate start, includes power supply, cables. Linux on SD card
|Development Kit basic for miriac® MPX-S32G274||859011|
4 Arm® Cortex®-A53, 1.0 GHz, 4 GB LPDDR4 w ECC, 64 MB NOR Flash, 16 GB eMMC, 0 °C to 70 °C, w/o SEC
|Development Kit basic for miriac® MPX-S32G274||859014|
4 Arm® Cortex®-A53, 1.0 GHz, 4 GB DDR4L w ECC, 64 MB NOR Flash, 32 GB eMMC, -40 °C to 85 °C, w SEC
4 Arm® Cortex®-A53, 1.0 GHz, 4 GB DDR4L w ECC, 64 MB NOR Flash, 16 GB eMMC, 0 °C to 70 °C, w/o SEC
4 Arm® Cortex®-A53, 1.0 GHz, 4 GB DDR4L w ECC, 64 MB NOR Flash, 32 GB eMMC, -40 °C to 85 °C, w/o SEC
Q: Only eth0 (the top RJ45 on ST22) shows up as an interface on the S32G. How can I enable the other ethernet interfaces on the S32G?
A: If only eth0 shows up, have you checked that the PFE firmware is loaded ok in U-Boot? If yes, you will also have pfe0, pfe1, pfe2
Q: None of the SJA1110A ethernet ports link up. I'm guessing this is because I need to load an image on the SJA1110A.Is ST10 the JTAG header to use? What is J45 on the same header?
A: Yes, ST10 is the header to use. The other device in the JTAG chain, J45, is the Marvell 10GigE PHY (88X3310P) - which we have discarded on Rev.2 Carriers.
Q: Will the S32G detect the SJA1110A and forward traffic once an image is loaded or will I need another S32G image?
A: The SJA110 will forward traffic with the binary image loaded. But traffic coming from the S32G processor will need to be programmed to the SJA1110
Q: Is there a QSPI attached to the SJA1110, and is there a way for me to flash the QSPI?
A: Yes, there is a QSPI Flash attached to the SJA1110 which can be programmed using a Lauterbach debugger
Q: How do we select the boot mode for the SJA1110A?
A: When SW3 are both OFF, then you can program the Flash from debugger. When both switches are ON, the SJA1110 will boot from Flash
Q: In our environment, we need solutions that are available over a very long period of time (up to 15 years). How long are your modules available?
A: Using NXP CPUs on our SoMs we are able to provide an availability of 15 years from the time of the launch of the CPU. With LTB and long-time stocking we are even able to extend this period.